Digital processors are often called upon to act on the presence or absence of events such as electrical pulses, pulses of light, and so forth. The processor makes decisions based upon the occurrence of one or more events. Typically each event is presented to the processor as a pulse or as a transition from one logic level to another. The events, representing information, occur within certain periods of time and may only be present for only a very short time. These events are often so fast that they must be detected by fast acting event capture circuits, e.g., latches, flip-flops, counters and the like. The fast acting event capture circuits are then subsequently read by the digital processor which may then act upon the presence or absence of the detected event.
The event capture circuit may be external to the digital processor and is adapted to be read by the processor. Whenever the processor reads the event capture circuit and determined that an event has occurred, generally, the processor will reset the event capture circuit for detecting the next event. In this way the processor can check or pole the event capture circuit for an event occurrence during a more flexible time period (e.g., any time after the event). So long as the processor checks and resets the event capture circuit before a second event can occur, each event may be detected by the processor.
When the occurrence of an event is read by the processor, the processor must then reset the event capture circuit so that it may capture the next event. Resetting the event capture circuit requires the processor to perform a write operation to the event capture circuit reset input. Thus, the processor must do a plurality of read operations in determining whether an event has been captured by the event capture circuit. Once the occurrence of the event is read, the processor must than do a write operation to immediately reset the event capture circuit. A processor write operation takes valuable processor instruction execution time and thus reduces the time available for other processor operations or restricts the maximum rate in which events can occur that the processor may determine. In addition, the reset output from the processor uses up a valuable input/output (I/O) pin of the processor package.
FIG. 1 illustrates a schematic block diagram of a prior art event capture circuit comprising a flip-flop 104 and a microprocessor 106. The Q output of the flip-flop 104 goes from a first logic level to a second logic level whenever an event 102 is detected by the flip-flop 104 input. The microprocessor 106 reads the output 108 of the flip-flop 104, and when the second logic level is detected, the microprocessor 106 resets the flip-flop 104 with a reset signal 110. The prior art circuit of FIG. 1 requires both an input to and an output from the microprocessor 106. Valuable program instruction time is spent resetting the flip-flop 104, and two dedicated integrated circuit package connections are required.
What is needed is a faster and more efficient way of detecting the occurrence or non-occurrence of events with a digital processor.